diff --git a/src/helper.cpp b/src/helper.cpp
index b361734..d021b88 100644
--- a/src/helper.cpp
+++ b/src/helper.cpp
@@ -61,7 +61,32 @@ void checkResetReason() {
     writeErrorLog(&s[0]);
   }
 #else  // defined (ESP32)
-#warning "Todo: Handle reset reasons on ESP32"
+  RESET_REASON r = rtc_get_reset_reason(0); // We only check cpu0 since we dont use cpu1 on the esp32
+  String rStr;
+
+  switch (r) {
+    case 0  : rStr = F("None"); break;
+    case 1  : rStr = F("vbat power on reset"); break;
+    case 3  : rStr = F("software reset digital core"); break;
+    case 4  : rStr = F("legacy watch dog reset digital core"); break;
+    case 5  : rStr = F("deep Sleep reset digital core"); break;
+    case 6  : rStr = F("reset by SLC module, reset digital core"); break;
+    case 7  : rStr = F("timer Group0 Watch dog reset digital core"); break;
+    case 8  : rStr = F("timer Group1 Watch dog reset digital core"); break;
+    case 9  : rStr = F("RTC Watch dog Reset digital core"); break;
+    case 10 : rStr = F("instrusion tested to reset CPU"); break;
+    case 11 : rStr = F("time Group reset CPU"); break;
+    case 12 : rStr = F("software reset CPU"); break;
+    case 13 : rStr = F("RTC Watch dog Reset CPU"); break;
+    case 14 : rStr = F("for APP CPU, reseted by PRO CPU"); break;
+    case 15 : rStr = F("reset when the vdd voltage is not stable"); break;
+    case 16 : rStr = F("RTC Watch dog reset digital core and rtc module"); break;
+    default : rStr = F("unknown reset reason"); break;
+  }  
+
+  Log.notice(F("HELP: Last reset cause '%s' (%d)" CR), rStr.c_str(), r);
+
+  #warning "TODO: Implement logging of crashes for esp32"
 #endif
 }