Added esp32 reset reason
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@ -61,7 +61,32 @@ void checkResetReason() {
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writeErrorLog(&s[0]);
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}
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#else // defined (ESP32)
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#warning "Todo: Handle reset reasons on ESP32"
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RESET_REASON r = rtc_get_reset_reason(0); // We only check cpu0 since we dont use cpu1 on the esp32
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String rStr;
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switch (r) {
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case 0 : rStr = F("None"); break;
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case 1 : rStr = F("vbat power on reset"); break;
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case 3 : rStr = F("software reset digital core"); break;
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case 4 : rStr = F("legacy watch dog reset digital core"); break;
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case 5 : rStr = F("deep Sleep reset digital core"); break;
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case 6 : rStr = F("reset by SLC module, reset digital core"); break;
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case 7 : rStr = F("timer Group0 Watch dog reset digital core"); break;
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case 8 : rStr = F("timer Group1 Watch dog reset digital core"); break;
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case 9 : rStr = F("RTC Watch dog Reset digital core"); break;
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case 10 : rStr = F("instrusion tested to reset CPU"); break;
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case 11 : rStr = F("time Group reset CPU"); break;
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case 12 : rStr = F("software reset CPU"); break;
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case 13 : rStr = F("RTC Watch dog Reset CPU"); break;
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case 14 : rStr = F("for APP CPU, reseted by PRO CPU"); break;
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case 15 : rStr = F("reset when the vdd voltage is not stable"); break;
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case 16 : rStr = F("RTC Watch dog reset digital core and rtc module"); break;
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default : rStr = F("unknown reset reason"); break;
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}
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Log.notice(F("HELP: Last reset cause '%s' (%d)" CR), rStr.c_str(), r);
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#warning "TODO: Implement logging of crashes for esp32"
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#endif
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}
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